Publications

Scalable and Practical Locking With Shuffling
Sanidhya Kashyap, Irina Calciu, Xiaohe Cheng, Changwoo Min, and Taesoo Kim
SOSP 2019
[paper]

Project PBerry: FPGA Acceleration for Remote Memory
Irina Calciu, Ivan Puddu, Aasheesh Kolli, Andreas Nowatzyk, Jayneel Gandhi, Onur Mutlu, Pratap Subrahmanyam
HotOS 2019
[paper]

How to implement any concurrent data structure
Irina Calciu, Siddhartha Sen, Mahesh Balakrishnan, Marcos K. Aguilera
Communications of the ACM (CACM), December 2018
[full text]

Passing messages while sharing memory
Marcos K. Aguilera, Naama Ben-David, Irina Calciu, Rachid Guerraoui, Erez Petrank, Sam Toueg
PODC 2018
[paper]

Remote regions: a simple abstraction for remote memory
Marcos K. Aguilera, Nadav Amit, Irina Calciu, Xavier Deguillard, Jayneel Gandhi, Stanko Novakovic, Arun Ramanathan, Pratap Subrahmanyam, Lalith Suresh, Kiran Tati, Rajesh Venkatasubramanian, Michael Wei
ATC 2018
[paper]

Resource disaggregation for the 99%
Irina Calciu, Aasheesh Kolli, Jayneel Gandhi, Stanko Novakovics, Marcos Aguilera, Rajesh Venkatasubramanian, Pratap Subrahmanyam
WAMS@ASPLOS 2018

Remote Memory Persistency
Aasheesh Kolli, Jayneel Gandhi, Irina Calciu, Stanko Novakovic
WAMS@ASPLOS 2018

How to implement any concurrent data structure for modern servers
Irina Calciu, Siddhartha Sen, Mahesh Balakrishnan, Marcos K. Aguilera
Operating Systems Review (OSR) 2017
[paper]

Remote memory in the age of fast networks (Vision Paper)
Marcos K. Aguilera, Nadav Amit, Irina Calciu, Xavier Deguillard, Jayneel Gandhi, Pratap Subrahmanyam, Lalith Suresh, Kiran Tati, Rajesh Venkatasubramanian, Michael Wei
SoCC 2017
[paper]

Brief Announcement: Black-box Concurrent Data Structures for NUMA Architectures
Irina Calciu, Siddhartha Sen, Mahesh Balakrishnan, Marcos K. Aguilera
DISC 2017
[paper] [slides]

Black-box Concurrent Data Structures for NUMA Architectures
Irina Calciu, Siddhartha Sen, Mahesh Balakrishnan, Marcos K. Aguilera
ASPLOS 2017, BEST PAPER AWARD
selected for SIGPLAN Research Highlights
[paper] [slides]

Concurrent Data Structures for Near-Memory Computing
Zhiyu Liu, Irina Calciu, Maurice Herlihy, Onur Mutlu
SPAA 2017
[paper] [slides]

NVMOVE: Helping Programmers Move to Byte-Based Persistence
Himanshu Chauhan, Irina Calciu, Vijay Chidambaram, Eric Schkufza, Onur Mutlu, Pratap Subrahmanyam
INFLOW @ OSDI 2016
[paper]

The Adaptive Priority Queue with Elimination and Combining
Irina Calciu, Hammurabi Mendes, Maurice Herlihy
DISC 2014
[paper] [slides]

Invyswell: A Hybrid Transactional Memory for Haswell's Restricted Transactional Memory
Irina Calciu, Justin Gottschlich, Tatiana Shpeisman, Gilles Pokam, Maurice Herlihy
PACT 2014
[paper] [slides]

Improved Single Global Lock Fallback for Best-effort Hardware Transactional Memory
Irina Calciu, Tatiana Shpeisman, Gilles Pokam, Maurice Herlihy
TRANSACT 2014, BEST PAPER AWARD
[paper] [slides]

Optimized Single Global Lock Fallback
Irina Calciu, Justin Gottschlich, Tatiana Shpeisman, Gilles Pokam, Maurice Herlihy
WTM 2014

Message Passing or Shared Memory: Evaluating the Delegation Abstraction for Multicores
Irina Calciu, Dave Dice, Tim Harris, Maurice Herlihy, Alex Kogan, Virendra Marathe, Mark Moir
OPODIS 2013
[paper]

Using Elimination and Delegation to Implement a Scalable NUMA-Friendly Stack
Irina Calciu, Justin Gottschlich, Maurice Herlihy
HOTPAR 2013 (acceptance rate 46%)
[paper][slides][video]

NUMA-Aware Reader-Writer Locks
Irina Calciu, Dave Dice, Yossi Lev, Victor Luchangco, Virendra J. Marathe, Nir Shavit
PPOPP 2013 (acceptance rate 18%)
[paper] [slides]

Shared Nothing Transactional Memory
Maurice Herlihy and Irina Calciu
SFMA 2011

Service

Work Experience

Microsoft Research New York City
Research intern, working on concurrent data structures for NUMA machines.
I worked with Siddhartha Sen (MSR) and Marcos K. Aguilera and Mahesh Balakrishnan (VMware Research Group).
New York City, NY, February - May 2015.

Microsoft Research Silicon Valley
Research intern, working on concurrent data structures for NUMA machines.
I worked with Marcos K. Aguilera, Mahesh Balakrishnan, Rama Ramasubramanian, and Siddhartha Sen.
Mountain View, CA, May - August 2014.

Intel Labs
Visiting researcher, working on hybrid transactional memory.
April 2013 - April 2014.

Intel Labs
Research intern, working on hybrid transactional memory.
I worked with Justin E. Gottschlich, Tatiana Shpeisman, and Gilles Pokam.
Santa Clara, CA, June - December 2012.

Oracle Labs
Research intern, working on NUMA-aware algorithms.
I worked with the Scalable Synchronization group.
Burlington, MA, June - September 2011

Google
Software engineer intern in the Platforms Networking team (summer 2010, Mountain View, CA) and Mobile Gateway team (summer 2007, Munich, Germany)

Mozilla
Software engineer intern in the Platform team.
Summer 2009, Mountain View, CA.

Patents and applications

7. #10,001,949 Transactional memory management techniques

6. #9,971,627 Enabling maximum concurrency in a hybrid transactional memory system

5. #9,697,040 Software replayer for transactional memory programs

4. #9,639,392 Unbounded transactional memory with forward progress guarantees using a hardware global lock

3. #9,588,801 Apparatus and method for improved lock elision techniques

2. #9,361,152 Transactional memory management techniques

1. #8,966,491 System and method for implementing NUMA-aware reader-writer locks