Computational Nanotechnology

One nanometer, or 10-9 meters, is the length of a single sugar molecule. A cubic nanometer provides only enough room for a few hundred carbon atoms. Since it may never be possible to create novel arrangements of subatomic particles, a nanometer represents the approximate lower limit on the size of technology. Nanometer-scale technology, or ``nanotechnology'', has a wide range of potential applications.

The dream of nanoscale computing was first brought to prominence by Richard Feynman in his 1959 speech to the American Physical Society. As he put it, "there's plenty of room at the bottom", meaning no physical law would prevent the room-sized computers of the 50's from becoming far more powerful, pin-sized computers built from nanoscale components. Feynman knew that computers would be vastly more useful if the number of operations performed per second increased by several orders of magnitude. Although this observation has long since proven true, we only now approach the nanoscale devices Feynman forsaw.

In the past decade nanoscale wires, storage devices, and logic gates have all been produced, paving the way for nanoscale circuitry. Producing a computer architecture from nanoscale devices, however, is not simply a matter of substituting miniscule components into today's architectures. To manufacture nanoscale architectures we must find ways to interconnect billions of devices, even though our ability to place and align individual devices is poor. Furthermore, as devices shrink, we must learn to mitigate their variation. Nanoscale architectures must function correctly even when individual devices fail.

Stochastic assembly and fault-tolerance are two of the fundamental challenges that face the field of computational nanotechnology. They are not specific to a particular type of manufacturing process or even to silicon. Our research explores these challenges in the context of the nanowire crossbar, the current front runner for producing nanscale memories and circuits. We are particularly interested in "nanowire decoders", devices for controlling a large number of nanoscale wires with a small number of lithographically produced mesoscale wires. We have considered a number of decoder technologies and determined the number of mesoscale wires required to reliably control individual nanowires with high probability.


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